PART |
Description |
Maker |
CY7C1143KV18-450BZC CY7C1145KV18-400BZXI CY7C1145K |
18-Mbit QDRII SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)
|
Cypress
|
CY7C1243KV18-400BZC CY7C1243KV18-450BZC CY7C1245KV |
36-Mbit QDRII SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)
|
Cypress
|
CY7C1264XV18-366BZXC CY7C1264XV18-450BZXC |
36-Mbit QDRII Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress
|
CY7C2263XV18-633BZXC CY7C2263XV18-600BZXC CY7C2265 |
36-Mbit QDRII Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
|
Cypress
|
CAT64LC10ZJ CAT64LC10ZP CAT64LC10J-TE7 CAT64LC10J- |
18-Mbit QDR-II SRAM 4-Word Burst Architecture 18-Mbit DDR-II SRAM 2-Word Burst Architecture 36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 4-Mbit (256K x 18) Flow-Through Sync SRAM SPI串行EEPROM SPI Serial EEPROM SPI串行EEPROM
|
Analog Devices, Inc.
|
CY7C1316BV18 CY7C1318BV18 CY7C1916BV18 CY7C1320BV1 |
18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst结构,18-Mbit DDR-II SRAM) 18兆位的DDR - II SRAM字突发架构(2字突发结18 -兆位的DDR - II SRAM的) 18-Mbit DDR-II SRAM 2-Word Burst Architecture(2瀛?urst缁??,18-Mbit DDR-II SRAM)
|
Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
|
CAT64LC20ZS CAT64LC20ZP CAT64LC20J-TE7 CAT64LC20J- |
36-Mbit QDR-II SRAM 4-Word Burst Architecture 36-Mbit QDR-II SRAM 2-Word Burst Architecture 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL Architecture 4-Mbit (128K x 36) Pipelined SRAM with NoBL Architecture 4-Mbit (128K x 36) Flow-through SRAM with NoBL Architecture 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture SPI Serial EEPROM SPI串行EEPROM 36-Mbit QDR™-II SRAM 2-Word Burst Architecture SPI串行EEPROM 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM SPI串行EEPROM 256K (32K x 8) Static RAM SPI串行EEPROM
|
Analog Devices, Inc. Electronic Theatre Controls, Inc.
|
CAT93C46AJ CAT93C46AJI CAT93C46AJI-2.5 CAT93C46AJ- |
72-Mbit QDR-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 72-Mbit QDR-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 256K (32K x 8) Static RAM 256 Kb (256K x 1) Static RAM 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) Microwire Serial EEPROM 微型导线串行EEPROM
|
Atmel, Corp.
|
CY7C1514V18 CY7C1514V18-200BZC CY7C1514V18-250BZC |
72-Mbit QDR-II?SRAM 2-Word Burst Architecture 72-Mbit QDR-II(TM) SRAM 2-Word Burst Architecture 72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture 72-MBIT QDR-II⒙ SRAM 2-WORD BURST ARCHITECTURE 72-Mbit QDR-II SRAM 2-Word Burst Architecture
|
CYPRESS[Cypress Semiconductor]
|
HM66AQB18204BP-33 HM66AQB36104BP-40 HM66AQB9404BP- |
Memory>Fast SRAM>QDR SRAM 36-Mbit QDRTMII SRAM 4-word Burst
|
Renesas Technology / Hitachi Semiconductor
|